Eduardo Quiñones is a senior researcher at BSC. He received his MS degree in 2003 and his PhD. in 2008 at the Universitat Politecnica de Catalunya. His area of expertise is in safety-critical systems and high performance compiler techniques. He also has experience in hardware simulation methodologies. He is currently involved in the MERASA FP7 project. He spent one year as a student intern at Intel Research Labs (2002 - 2003).