Probabilistically Analysable Real-Time Systems

Francisco J. Cazorla - Technical Manager

Francisco J. Cazorla is the leader of the group on Interaction between the Operating System and the Computer Architecture at BSC. He is member of HIPEAC. He has worked in industry projects with several processor vendor companies (Intel, IBM, Sun) as well as in FP6 (SARC) and FP7 Projects (MERASA). He has led two industrial projects, one with IBM and one with Sun Microsystems, and he currently leads the BSC effort on the MERASA project. He has two submitted patents on the area of hard-real time systems. His research area focuses on multithreaded architectures for both high-performance and real-time systems on which he is co-advising seven PhD theses. He has co-authored over 25 papers in international refereed conferences and journals. He spent one summer as a student intern with IBM's T.J. Watson in New York in 2004.